Which semiconductor scarcity rents are structural rather than cyclical?

Structural semiconductor rents sit in hard-to-replicate capabilities: ASML’s EUV lithography, frontier foundry execution, and EDA/IP embedded in design workflows. HBM retains a durable premium through yield, stacking, and qualification, though today’s broad memory profits are cyclical. Packaging slots, most mature-node shortages, and disruption-driven material premiums should fade as capacity arrives. The ranking could change if rivals match EUV, frontier yields, or qualified HBM at scale. Evidence is stronger on competitive structure than duration.

The durable rents are in capabilities, not today’s shortages

The clearest structural semiconductor scarcity rents are EUV lithography, leading-edge foundry capability, and EDA/IP. HBM has a durable product premium, but current memory windfalls do not. Most advanced-packaging capacity, mature-node shortages, and disruption-driven material premiums are cyclical.

A rent is structural when it survives added capacity. Replication must require scarce IP, tacit yield knowledge, lengthy qualification, or deep ecosystem integration. A high price caused mainly by slow construction or an unexpected demand surge is cyclical, even if the shortage lasts several years.

EUV is the strongest structural tollbooth

ASML’s EUV position is the highest-conviction structural rent. The OECD identifies ASML as the only EUV-equipment provider. It also says several layers at process nodes of 5 nanometers and below can only be produced with EUV. This is technological non-substitutability, not merely insufficient factory space.

The replication barrier is system-wide. ASML spent €4.7 billion on R&D in 2025 and coordinated 5,100 suppliers. It ended the year with a €38.8 billion backlog and reported a 51.8% gross margin. Its installed base also supports recurring service and upgrade activity. Orders remain cyclical, but the underlying lithography franchise should retain scarcity value (ASML 2025 Annual Report; OECD, 2025).

Other equipment and material niches are less certain. Three suppliers held 75% of wafer-cleaning equipment in 2022, while two Japanese companies supplied more than half of silicon wafers. Such concentration creates vulnerability. It proves a structural rent only when purity requirements, proprietary processing, or customer qualification make substitution persistently difficult.

Frontier foundry and design infrastructure also earn structural rents

TSMC’s durable advantage comes from process development, yield learning, manufacturing execution, design enablement, and customer trust. TSMC says developing technology, preparing capacity, and reaching volume production takes more than five years. A14 now requires five to seven years. Designs therefore cannot move between foundries like commodity orders.

The economics are consistent with that differentiation. Nodes at 7 nanometers and below produced 77% of TSMC’s second-quarter 2026 wafer revenue, while gross margin reached 67.7%. However, today’s allocation premium is less durable. TSMC is adding three 3-nanometer fabs, converting 5-nanometer tools, and spending $60–64 billion in 2026. Capacity can catch up while the process moat remains (TSMC Q2 2026 transcript).

EDA and core IP form another structural tollbooth. Modern chip design involves more than 40 tool steps and depends on EDA, reusable IP, and foundry process-design kits. The OECD says Cadence, Synopsys, and Arm together represent more than 60% of EDA and 70% of IP. Long workflows and foundry integration make these capabilities harder to replace than physical capacity (OECD, 2025).

HBM is structurally differentiated, but memory pricing is cyclical

HBM commands a defensible premium because bandwidth, power efficiency, stacking, packaging, yield, and customer co-development matter. SK hynix emphasizes HBM4 operating speed, power efficiency, high yield, and production stability. Micron says each HBM generation consumes relatively more wafer capacity, pressuring non-HBM supply. These features favor qualified leaders (SK hynix Q2 2026 results; Micron FQ3 2026 presentation).

Current industry profits nevertheless contain a large cyclical component. Micron’s quarterly DRAM and NAND prices rose by low-60s and mid-80s percentages, respectively, lifting non-GAAP gross margin to 84.9%. SK hynix reported a 76% operating margin amid broad DRAM and NAND price increases. Micron expects new wafer and HBM-packaging capacity from 2027, while its five-year take-or-pay contracts may partly lock in peak-cycle economics. The durable element is HBM differentiation, not today’s blanket memory price level.

Packaging slots, broad mature nodes, and disruptions rank lower

TSMC says packaging constraints limit customer growth, yet it welcomes competing capacity. It allocates 10–20% of capital spending to packaging, testing, masks, and related assets. It also expects an alternative packaging pipeline to mature in about one year. Proprietary integration may retain value, but scarce CoWoS slots are unlikely to be permanent.

Broad mature-node scarcity is weaker still. TSMC reports strength in power-management chips and image sensors, but weak commodity mature-node demand. SIA says foundational-chip sales remained below their 2022 peak and Chinese overcapacity was depressing prices (SIA 2026 report). Automotive and reliability-qualified niches may retain premiums; mature-node capacity generally will not.

The ranking would change if competitors achieved comparable EUV systems, frontier yields, or qualified HBM at scale. Conversely, persistent qualification failures would strengthen selected materials and packaging rents. Evidence is strongest on competitive structure, not duration: OECD trade data end in 2022, while many 2026 capacity claims come from suppliers themselves.